1. Field of the Invention
The present invention relates to a network apparatus, a control method for the network apparatus, a control program, and a packet network system.
2. Description of Related Art
A network apparatus such as a switching processer or the like, generally uses both a DRAM (Dynamic Random Access Memory) storing packet data and an SRAM (Static Random Access Memory)/CAM (Content Addressable Memory) storing a forwarding database (FDB) used for packet-forwarding.
In such a network apparatus that shares the FDB with multiple processers used for forwarding packets, when an data error is detected, rewriting of data is performed by another processer which is different from the processor that is used for forwarding packets. Thereby, when a memory error occurs in the network apparatus, data recovery cannot be performed by individual processors in the switching processer.
In semiconductor memories, there is a problem called a soft-error in which specific radiation generates noise in the semiconductor and inverts the state of the memory. Once abnormal data is generated in the network apparatus which includes a DRAM storing packet data and an SRAM/CAM storing data, the network apparatus does not correctly perform data-forwarding, and which affects the network.
As a solution for a soft-error, a specific material is used in a device for improving the tolerance for soft-errors, or an error correction circuit is added to the memory circuit as a peripheral circuit of the memory.
For example, Japanese Unexamined Patent Application, First Publication No. 2009-216400 (patent document 1) describes an error correction code creation circuit that creates an error correction code for entry data written in a CAM and error detection and correction circuits used for detecting and correcting a data error based on the error correction code with respect to data read from the CAM. Thus, the error detection and correction circuits perform detection and correction of errors based on the error correction code with respect to the read-out data from the CAM.
As described above, the network is affected if abnormal data is generated in the data stored in the SRAM/CAM of the network apparatus that uses both the DRAM storing packet data and the SRAM/CAM storing the forwarding database for packet-forwarding. For this issue, as described in patent document 1, an error correction process can be performed by adding an error correction code to the data stored in the SRAM/CAM.
However, it is difficult for the SRAM/CAM to correct an error by adding an error code because the operation speed of SRAM/CAM is fast and the bit cost is high compared to those of the DRAM.